4096 Gated J-K Flip-Flop

A CD4096 CMOS integrated circuit providing a gated J-K flip-flop. A J-K flip-flop with gated inputs, used in counters and control logic requiring conditional state changes. Being 4000-series CMOS it runs on anything from 3 to 18 volts, which makes it far more flexible than 5V-only TTL logic and lets it work directly in battery and higher voltage circuits. It also draws almost no current when idle. The trade-off is speed: CMOS of this family is slower than 74HC logic, so it suits control, timing and teaching applications rather than fast data paths. Unused inputs must be tied to a supply rail, never left floating. Wide 3-18V supply range, unlike 5V-only TTL; Extremely low quiescent current suits battery circuits; High noise immunity from the wide logic swing; Standard 14-pin DIP fits breadboards and sockets